Shift and rotate circuit for a data processor



March 19, 1968 D. MUIR 3,374,463

SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSOR Filed Dec. 23, 1964 18Sheets-Sheet l M "ME 1 ADDRESS ADDRESS I REGISTER E ElREUI J L Vii 109 3ml m MEMORY JT m no 5 I i INSTRUCTION 7 Q'SK QQE SHIFT/ROWE I I LREGISTER CRCUIT CIRCUIT( 11?.EEEWWE I COMPLEMENT TRANSLATOR 1 I CIRCUITk n ,7, "WEE 1 R02 E EJ L REGISTER I03 L DIRECTOR I I03 :05 I [I06 IEEGISTER (REGISTER; REGISTER] I H L REGISTER 07 SELECTOR ACCUMULATORT108 INVENTO/Q V 0. MU/R, 122

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SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSOR Filed Dec. 23, 1964 18sheetssheet 1 FIG. 7

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SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSOR Filed Dec. 23, 1964 18Sheets-$heet FIG. 8A

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D. MUIR Ill March 19, 1968 SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSORl8 Sheets-Sheet l 6 Filed Dec. 23, 1964 mo C335 HZMEU EEOU Oh G M5 kw 18sheetssheet T 7 BLOCKING D. MUIR III TERM ACCOM PLISH TRANSMISSIONFUNCTION FOR BLOCKED PATHS WW W W W W Wm @EMW mmmmm mm W H E A; [E [FL[[[CLEFLFLEEEL [E SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSORTRANSMISSION FUNCTIONS OF PATHS WHICH ARE BLOCKED TO ACCOMPLISI-I RIGHTSHIFTS FIG. /7

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United States Patent 3,374,463 SHIFT AND ROTATE CIRCUIT FOR A DATAPROCESSOR David Muir III, Minerva Park, Ohio, assignor to Bell TelephoneLaboratories, Incorporated, New York, N.Y., a

corporation of New York Filed Dec. 23, 1964, Ser. No. 420,566 23 Claims.(Cl. 340172.5)

ABSTRACT OF THE DISCLOSURE A shift and rotate arrangement including agroup of serially connected unidirectionally oriented rotate circuitsconnected between input and output terminals and a control circuit whichsimultaneously operates all the rotate circuits. Rotate and shiftoperations of any specified mag nitude in either direction are performedby additive r0- tate operations during a single transmission of a dataword from the input terminals through the series of rotate circuits tothe output terminals by selective control of individual gating elementswithin the respective rotate circuits.

This invention relates to data processors and more particularly to shiftand rotate circuits for use therein.

In many data processing systems it is necessary to shift and rotate datawords. In conventional prior art data processors a word is first placedin one of the system registers. The word is then shifted or rotated, tothe left or the right, in the register itself. Although the termshifting is used throughout this specification in its generic sense asincluding the rotate operation, a shift operation is distinct from arotate operation. When the bits in the data word are shifted out of oneof the ends of the register during a rotate operation they arereinserted at the other end of the register. When the word is to beshifted rather than rotated the bits shifted out of the register are notreinserted at the other end and US are written in the stages at thisother end of the register. Since the data word may be shifted or rotatedto the right or the left it is apparent that four distinct operationsare possible. The magnitude of the shift in each case must be specified.

In conventional prior art circuits the data word in a register isshifted one position at a time. An improved shift and rotate circuit isdisclosed in the copending applica tion of W. B. Cagle et a1. Ser. No.380,274, filed July 6, 1964. now US. Patent 3,350,692, issued Oct. 31.1967. In this circuit the bits in the register may be shifted more thanone position at a time and the time required for a shift or rotateoperation is materially reduced. However, in this circuit as well as inconventional prior art circuits the data word to be shifted must firstbe placed in a register before it may be operated upon by the shiftingcircuitry.

A common sequence of operations in a data processor is the reading of adata word from a memory into one of the system registers, followed bythe shifting of the data word in the register. An exceedingly efficientdata processor would be one which could shift a data word during itstransmission from the memory to the register. In such a system thereading and shifting operations could be performed in the same step andit would not be required to first place the data word in the registerbefore shifting it. Similarly, another sequence of operations which isoften required is the transfer of a data word from one register toanother followed by the shifting of the data word in the latterregister. Again, a machine which could shift the data word while it isbeing transferred from one register to the other would be highlydesirable. In the prior art Patented Mar. 19, 1968 however, it has notbeen possible to shift the data word while transferring it within thedata processor. It has been necessary to first place the word in aregister and then shift it. Prior art shift and rotate circuits arecapable of operating only in conjunction with a register; it has priorlybeen possible to shift a data word only after it first appears in somekind of storage mechanism.

It is a general object of this invention to provide an improved dataprocessor in which logical operations may be performed on data wordswhile they are being transferred from one part of the machine toanother.

In prior art shift and rotate circuits in which a data word may beshifted in either direction it is usually necessary to provide circuitryfor shifting the bits in the data word to both the left and the right.Typically this circuitry has included gates which are capable oftransferring the bits in the stages of a register to other stages toeither the left or the right. While my invention contemplates shifting adata word while it is being transferred, rather than shifting it afterit is first placed in a register, it would appear that it would benecessary to once again provide two mechanisms for shifting the bits inthe data word in the two directions. This is due to the fact that thelogical operations performed in my invention are the same as thoseperformed in the prior art circuits.

It is a more specific object of this invention to provide for shift orrotate operations in either direction by the use of unidirectionalrotate circuitry.

In accordance with the principles of my invention I incorporate acombinational logic circuit in the path of a data processor over which adata word is transferred from one unit to another. There are two typesof inputs to the combinational logic circuit. One set of inputsrepresents the type of operation to be performed, i.e., shift or rotate,the direction of the shift, i.e., left or right, and the shiftmagnitude. The other input is supplied by a series of conductors in thetransfer path, each of these conductors having an electrical signaltherein representative of one of the bits in the data word beingtransferred in the machine. The Output of the combinational logiccircuit is provided over another series of conductors each having anelectrical signal representative of one of the bits in the shifted dataword. The combinational logic circuit is characterized. by gatingcircuits which allow the flow of bit information between bit position ofthe data word.

In a typical prior art data processor the transfer path comprises aseries of conductors arranged in ascending order of significance, eachhaving one of the bits in the data word being transferred representedtherein. In a data processor incorporating the shift and rotate circuitof my invention the signals in the output conductors represent bits inthe shifted data Word. These signals can control the writing of theshifted data word directly in a register or other memory device. Inother Words, the two units to which and from which the data word istransmitted may operate as they do in the prior art. But in the courseof the transfer of the data word it may be shifted so that a subsequentshift operation is not required.

The combinational logic shift and rotate circuit of my invention isparticularly advantageous when incorporated in an electronic dataprocessor. The shift and rotate circuit consists of a series of groupsof transmission gates for transferring signals representative of bitvalues from particular nodes in one group to respective nodes inanother. If transistors are used, for example, the delay in transmittingthe bits through any stage of the network is a function only of the timerequired to turn a transistor on or off. If the shift and rotate circuitincludes five stages, the total delay introduccd by the shift and rotatecircuit is merely approximately equal to five times this amount. Thetotal time may thus be only a fraction of a microsecond. Becauseelectronic gates operate so rapidly the data word may be shifted whileit is being transferred without introducing any appreciable delay in thetransfer time. The use of a combinational logic circuit, in lieu of ashift and rotate circuit which operates in conjunction with a registerand which must set and reset the various stages of the register, allowsthe shift operation to be performed simultaneously with the datatransfer operation, and to be performed more rapidly than heretoforepossible, thus allowing the data processor to proceed with other usefulwork.

In the illustrative embodiments of the invention the shift and rotatecircuit operates on 20-bit data words. Each of the two embodiments ofthe invention includes 120 nodes arranged in a matrix array of 20columns and six rows. The bits in the data word to be operated upon areapplied at the nodes in the top row, the most significant bit beingapplied to the leftmost node in the row and the least significant bitbeing applied to the rightmost node in the row. The final data wordappears at the 20 nodes in the last row. In the course of transmissionof the bits through the node network from the first row to the last thebits are operated upon as required.

Twenty transmission paths are provided for connecting the 20 nodes ineach row to the 20 respective nodes in the same columns in the nextlower row. Twenty transmission paths are also provided to connect thenodes in each row to respective nodes further to the right in the nextlower row. The number of columns separating the nodes in different rowswhich are connected to each other by these paths is the same for each ofthe groups of 20 diagonal paths, but the number of columns is differentfor the different groups of paths. Suppose the columns from left toright are numbered 19-0 and the rows from top to bottom are designatedA-F. Each of the 20 nodes in row A is connected by a respective verticaltransmission path to the node of row B directly below it. Each of thenodes in row A is also connected by a diagonal path to the node onecolumn to its right in row B. The rightmost node in row A is connectedto the node in row B in the next rightmost column, which, when rotationof the data word is considered, is column 19. The rotation of the dataword through the network is accomplished in steps. The first possiblestep is a shift of 1. If the 20 vertical paths are used the input dataword is merely transmitted down to the nodes in row B, but the bitpositions are unchanged. If the diagonal paths are used, however, theinput data word appears at the nodes in row B after having been rotatedone position to the right.

Similarly, 20 vertical paths connect the nodes in row B to the nodes inrow C. Twenty diagonal paths connect the nodes in row B to therespective nodes in row C two positions to the right. The rightmost nodein row B is connected to the node in row C in column 18. The node incolumn 1 of row B is connected to the node in column 19 of row C. If thevertical paths are used rather than the diagonal paths the bit patterntransmitted to the nodes in row C is the same as that originallyappearing at the nodes in row B. If, on the other hand, the diagonalpaths are used the bits at the nodes in row C are the same as those atthe nodes in row B except that they have been rotated two positions tothe right.

Similarly 20 vertical paths are provided between the nodes in rows C andD, the nodes in rows D and E, and the nodes in rows E and F. Thediagonal paths between nodes in rows C and D connect to each other nodeswhich are four columns apart. The diagonal paths between the nodes inrows D and E separate nodes which are eight columns apart, and thediagonal paths connecting the nodes in row E to the nodes in row F areconnected between nodes which are 16 positions apart. Either thevertical or the diagonal paths are used in transmitting bits from thenodes in row C to those in row D, from the nodes in row D to those inrow E. and from the nodes in row E to those in row F. If the diagonalpaths are used in the input bits are rotated 4, 8 or 16 positions to theright. By selecting the appropriate groups of diagonal paths the inputdata word may be rotated the desired amount to the right. The rotateddata word appears at the nodes in row F for transmission within the dataprocessor. By merely controlling either the vertical or the diagonalpaths between any two rows of nodes to transmit the bits over them theinput data word may be rotated to the right while it is transmittedthrough the network. If all of the transmission paths comprisetransistor gates the delay through the network is merely that requiredfor five transistors to turn on or off in sequence.

A more specific object of my invention concerns the shifting androtating of a data word in either direction by the use of circuitrywhich is capable of rotating the data word in only one direction. Theobvious advantage of such circuitry is that the total cost of the shiftand rotate circuit may be cut by a factor of approximately one half.

Consider a 20bit register containing a 20-bit data word. Suppose that aprior art shift and rotate circuit used in conjunction with the registerfor shifting its contents is capable of only rotating the bits in theregister to the right. The circuit may also be used for shifting r thedata word to the right. It is only necessary to block the bits shiftedout of the right end of the register frdm re-entry in the left end ofthe register. This circuit may also be used for rotating the registerword to the left. It is only necessary to complement the shift magnitudewith respect to 20 and then rotate the register word to the right anumber of positions equal to the complemented value. For example, a leftrotation of five positions is equivalent to a right rotation of 15. Theonly one of the four types of operation which remains to be accomplishedis a left shift. Suppose the shift magnitude is again complemented withrespect to 20 and the register word rotated to the right a number ofpositions equal to the complemented value. This will place the desiredbits in the correct register position. If specific examples areconsidered it will become apparent that the bit values which must beerased from the register, i.e., the bits for which US are to besubstituted in the register, are not those which are rotated out of theright end of the register, but rather those which are not rotated out ofthe register at all. While right rotation circuitry may be used foraccomplishing right shifts by blocking the bits which are rotated out ofthe right end of the register from re-entry at the left end, a similartechnique may not be used to control left shifts. The bits which must beblocked are those which are never rotated out of the register in thefirst place and the desired bits are those which are rotated out of theright end of the register and re-enter at the left end. For this reasonprior art shift and rotate circuits have included circuitry for rotatingto the left as well as to the right. Shifts, in either direction areobtained by blocking the bits which leave one of the ends of theregister.

According to an aspect of my invention however it is possible to shiftto the left with the use of right rotation circuitry in addition torotating in either direction and shifting to the right. The diagonaltransmission paths connecting nodes in the rightmost columns to nodes inthe leftmost columns merely need be blocked to contrbl right shifts-thebits shifted out of the right end of the system are not reinserted atthe left end. Left rotations may be accomplished by complementing thegiven shift magnitude with respect to 20 and then rotating to the rightthe complemented number of positions. As for left shifts, they may alsobe controlled by unconditionally blocking certain vertical transmissionpaths on left shifts in certain situations, and conditionally blockingother vertical paths on left shifts in other situations. Thedetermination of which paths must be blocked is too detailed to bebriefly described at this point. Sutlice it to say that by merelyblocking certain of the vertical trans-

